AVR32-Based SoC Offers High Throughput Solution for Compute-Intensive Embedded Control Applications

San Jose, California (ots/PRNewswire) -

- Combines Two Ethernet MACs, 480 Mbps USB With On-Chip PHY, LCD
Controller With High Throughput CPU, Dynamic Frequency Scaling

Atmel(R) Corporation (Nasdaq: ATML) today announced the AP7000
family of high-performance 32-bit digital signal controllers, the
first family based on the company's high-throughput AVR(R)32 core
announced last February. The AVR32 core consistently outperforms
competing 32-bit cores in every EEMBC(R) benchmark for performance
and code density and executes C/C++ algorithms.

SoC-level Integration. The AP7000 is the first processor family to
integrate, on a single chip, virtually all the functionality required
for multimedia systems deployed in mobile phones, digital cameras,
PDAs, automotive infotainment, set-top boxes and home entertainment
systems as well as network switches/routers and printers. It includes
a vectored multiplier co-processor, 32 KB on-chip SRAM, 16 KB
instruction and 16 KB data caches, memory management unit, DMA for
high-speed peripherals and peripheral DMA controller that allows data
to be transferred between peripherals and memories without wasting
processor cycles. Peripherals include a 16-bit stereo audio DAC,
2048x2048 pixel TFT/STN LCD controllers, 480 Mbps USB 2.0 with on
chip transceivers (PHY) and, two 10/100 Ethernet MACs. Serial
interfaces include RS232, USART, I2S, AC97, TWI/I2C, SPI, PS/2 and
several synchronous serial modules (SSC) supporting most serial
communication protocols.

This high level of integration allows the deployment of software
libraries and application code on a single platform, providing better
control of system integration, testing and time-to-market.

Integrates High-bandwidth Communications Protocols. AP7000 family
integrates USB 2.0 High Speed (480 Mbps) protocol with on-chip
transceivers (PHY), thus eliminating completely the requirement for
external USB controller. The AP7000 also integrates two 10/100 Mbps
Ethernet Media Access Control (MAC) blocks for full industry standard
connectivity.

Employs Comprehensive Power-saving Strategies. The exceptional
throughput of the AVR32 core allows applications to be executed at a
lower clock frequency than is required by competing processors. Since
power consumption is directly affected by the clock rate, low
frequency operation results in an immediate and proportional
reduction in power consumption. The AP7000's family
dynamically-controlled, multi-clock bus structure and SoC-level
integration further reduce system power drain.

For example, streaming a 320x240 MPEG movie over the AP7000's
on-chip Ethernet MAC at 100 Mbit/s and decoding it at 30 frames per
second requires a CPU clock of only 120 MHz and system bus clock of
only 60 MHz. The processor can also simultaneously run a full
Linux(R) operating system and drive a QVGA TFT LCD with these clock
frequencies. Total power consumption for this application is only 250
mW when using an AP7000-family processor.

Dynamic Frequency Scaling of Four Clock Domains. The AP7000
architecture has a multi-layer, high- speed bus architecture that
increases performance by allowing multiple operations to take place
in parallel. In addition, there are two peripheral bus bridges that
allow different clock frequencies to be set for high- and low-speed
peripherals. In a conventional bus structure, the bus clock is
determined by the fastest peripheral resulting in slower peripherals
that could operate on a slower bus, drawing unnecessary power. The
AP7000 architecture allows the dynamic configuration of the
individual clock frequencies of these two bridges, as well as those
of the CPU's internal clock and that of the bus matrix.

Dynamic frequency scaling algorithms are used to set the clocks in
each of the four domains at the lowest possible frequency for the
function it is performing. For example, when the application is
inactive but a Bluetooth(R) or IrDA(R) data transfer is occurring,
clocks for the CPU, bus matrix and high-speed bridge may shut down,
while the clock for the slow speed bridge is maintained.

AVR32 Core Outperforms Competing Cores in Every Benchmark for
Performance or Code Density. The AVR32 core was designed from the
ground up as a low clock frequency, low-power CPU with special
emphasis on 1) maximizing the use of computational resources with a 7
stage pipeline and three parallel sub- pipelines that supports
automatic data forwarding and out-of-order execution, 2) single-cycle
load/store instructions with pointer arithmetic that reduces cycles
required for load/store, 3) accurate branch prediction with
zero-penalty branches and 4) maximizing code density to reduce cache
misses.

Single Processor Tool Flow. Unlike multicore or two processor
solutions, the AP7000 family uses a single development environment
for straightforward debugging. The AVR32 Instruction Set Architecture
(ISA) is specifically designed for high-level programming languages
like C, C++ and Java(R). Compilers with C, and C++ support include
GNU GCC and IAR(R) Systems' Embedded Workbench(R). The compilers are
able to utilize the AVR32 architecture's SIMD- and DSP instructions
from within the C/C++ programming environment.The IAR compiler is
optimized to recognize patterns in the C-code that can use SIMD DSP
instructions, thus further increasing the ease of use and
performance when running compiled C-code applications. Both compilers
support access to in-line assembly for tight-loop / inner-loop
algorithmic optimizations.

GCC's GNU Debugger (GDB) is available directly from Atmel and
plugs directly into many integrated development environments
including the Eclipse(TM) debug environment.

The AP7000 family has a fully-supported Linux 2.6 kernel to
further ease the transition of existing code or the adoption of the
freely available numerous open source applications that are available
for use in embedded systems.

Availability and Pricing. The first device of the AP7000 family,
the AT32AP7000, is available now in a 256-ball CABGA package and is
priced at $16.60 in quantities of 10,000.

The STK(R)1000 starter kit is available at US$499, providing a
complete development environment.

Atmel's JTAGICE mk-II is available at US$299, providing In-Circuit
Emulation support.

About Atmel

Atmel is a worldwide leader in the design and manufacture of
microcontrollers, advanced logic, mixed-signal, nonvolatile memory
and radio frequency (RF) components. Leveraging one of the industry's
broadest intellectual property (IP) technology portfolios, Atmel is
able to provide the electronics industry with complete system
solutions. Focused on consumer, industrial, security, communications,
computing and automotive markets, Atmel ICs can be found Everywhere
You Are(R).

NOTE: Atmel(R), logo and combinations thereof, Everywhere You
Are(R), AVR(R), STK(R) and others are registered trademarks or
trademarks of Atmel Corporation or its subsidiaries. Other terms and
product names may be trademarks of others.

Information:

Atmel's AVR32 product information may be retrieved at
http://www.atmel.com/avr32

Press Contacts:
Philippe Faure, Marketing Communication Manager - Microcontrollers
Phone: +33-2-40-18-18-87, Email: philippe.faure@nto.atmel.com
Helen Perlegos, Public Relations - USA and Asia Pacific Rim,
Phone: +1-408-487-2963, Email: hperlegos@atmel.com
Veronique Sablereau, Corporate Communications Manager - Europe
Phone: +33-1-30-60-70-68, Fax: +49-71-31-67-24-23
Email: veronique.sablereau@atmel.com
Web site: http://www.atmel.com /

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Contact:
Philippe Faure, Marketing Communication Manager - Microcontrollers,
+33-2-40-18-18-87, or philippe.faure@nto.atmel.com; or Helen
Perlegos, Public Relations - USA and Asia Pacific Rim,
+1-408-487-2963, orhperlegos@atmel.com; or Veronique Sablereau,
Corporate Communications Manager - Europe, +33-1-30-60-70-68, or fax,
+49-71-31-67-24-23, or veronique.sablereau@atmel.com